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EET 3100 FINAL EXAM Study Guide $8.39   Add to cart

Exam (elaborations)

EET 3100 FINAL EXAM Study Guide

System level design of digital logic circuits using hardwired and programmable logic devices. ROMs, PROMs, and PLAs. Synchronous and asynchronous circuit design and analysis.

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  • December 21, 2022
  • 13
  • 2022/2023
  • Exam (elaborations)
  • Questions & answers
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Some examples from this set of practice questions

1.

Programmable Read Only Memory (PROM) ?

Answer: has a fixed, fully decoded AND plane and a programmable OR plane.

2.

Programmed Array Logic (PAL) ?

Answer: has a programmable AND plane and a fixed OR plane.

3.

Programmable Logic Array (PLA) ?

Answer: has both programmable AND and OR planes.

4.

Complex Programmable Logic Device (CPLD) ?

Answer: A high density programmable device generally based on the PAL architecture.

5.

Karnaugh Map (K-Map) ?

Answer: is a tool used in digital circuit analysis and design in order to simplify a logic equation (instead of using Boolean algebra).

6.

carry ?

Answer: A digit (or bit) that is carried over to the next most significant bit during an n-Bit addition operation.

7.

sum ?

Answer: The Result of an Addition Operation of two (or more) binary numbers (operands).

8.

1’s Complement ?

Answer: A form of signed binary in which negative numbers are created by complementing all bits.

9.

2’s Complement ?

Answer: A form of signed binary in which the negative numbers are created by complementing all the bits and adding a 1 (1’s Complement + 1).

10.

decoder ?

Answer: is a combinational circuit that converts binary information from n input lines to a maximum of 2 n unique output lines.

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